The system shall take Analog signals from different channels and process through LNA, DVGA chip to meet accurate signal gain. The processed signal is sent to Digital Down conversion chip it has a front end ADC and converted data is processed with different filters available in the DDC chip. The filtered data of 16 bit data is sent through I & Q channels. The DDC chip interface and control with FPGA.
The DAC’s are interfaced with FPGA and DDC outputs of I & Q channels are sent via DAC’s. This system uses on board clock for all functional operations. There is also an external clock through jumper where the on board clock will disable and external clock activated and performs all functional operations.